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Since the guest OS doesn’t have direct access to the GPU, like it does with the CPU, 3D performance is significantly limited.

That’s simply to boot into the guest OS! Then there’s the matter of 3D acceleration, which all modern EDA software requires, including DipTrace. Virtual Machines are also large and consume a ton of system resources. Also some smaller features like BOM in PCB Layout, tear-drops, etc. Overall improvements of routing usability and bus routing. You will not get power of PADs or other high-end EDAs in the first versions, but this is what we want to reach for this feature. Interactive push and shove router and trace editor. Additional fields in Pick and Place, tab divider in text files for BOM and Pick and Place. Rotate Group and Flip Group commands in Component and Pattern Editors. Always open/soldered option in custom mask/paste settings for pads and vias. Storing common solder mask swell and paste mask shrink with the project file. Polishing of length matching and meander features. Improved highlight and selection of objects in PCB Layout (traces and all other objects under footprints are highlighted and can be edited in default mode). DRC same net clearance check (Trace to Trace, SMD to Pad, SMD to Via, SMD to SMD). However some new tricks have been added too: 1. Just posted on the forum from DT Team: We have published new version 3.2 today, the major thing we changed in it is polishing of existing features (added in 3.0 and 3.1).